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Showing all articles related to Fan-out wafer level packaging

Dow to Present on Packaging for Smart Devices at European 3D Summit

January 19, 2017

At the European 3D Summit, Dow Electronic Materials’ Rozalia Beica takes a deeper look at global trends driving advanced packaging, highlighting applications, today’s technologies and future trends.

2017 Outlook: Trends in Advanced Packaging and China’s Role

January 18, 2017

With 2017 just getting underway, Dow business leaders have been examining trends and challenges the semiconductor industry will face. Here, Rob Kavanagh reviews significant changes in the advanced packaging space over the past year and identifies trends that will influence 2017, including growth in China.

2017 Outlook: Fan-out Wafer Level Packaging Goes Mainstream

January 13, 2017

Dow’s Rob Kavanagh joins other Dow leaders voicing their opinions on what’s coming in the semiconductor industry in the new year. In his 2017 outlook for Semiconductor Packaging News, Kavanagh looks at what’s needed to meet the challenges of fan-out water level packaging.

Copper Electroplating Fundamentals

November 22, 2016

This tutorial examines the concept of copper electroplating and how the process works. It also discusses its use in advanced packaging applications like the dual damascene process, TSV, copper pillars, and copper RDL, as well as how feature geometry as well as plating time affect how additives behave.

Managing Material Properties of Fan-out Wafer-Level Packages

August 30, 2016

Advanced packages require specialty electronic materials to be made profitably and reliably. Fan-out wafer level packaging (FOWLP), has three key structures to consider: the dielectric layer, the redistribution layer (RDL), and Cu pillars. Part two of this two-part FOWLP series investigates these key structures and considerations for managing material properties.

Dow’s Rozalia Beica to Present at the SEMICON Taiwan SiP Global Summit

August 23, 2016

The SiP Global Summit, which takes place during SEMICON Taiwan, is a two-day workshop devoted to advancements in system-in-package technologies. As part of this year’s novel material and equipment readiness segment of the program, Dow’s Rozalia Beica will tackle the challenges of both embedded technologies and fan-out wafer-level packaging.

Investigating Organic Photovoltaic Cells for Renewable Energy Conversion

August 02, 2016

Organic materials have significant potential for the next-generation of high-tech applications like solar cells, LEDs and displays. This paper explores our work with the University of Minnesota to improve understanding of how pure active materials must be to meet industry specifications and optimize device performance.

Fan-Out Wafer-Level Packaging and Its Material Evolutions

July 06, 2016

Multiple types of microchips superimposed on a white background

Recently, FOWLP has become one of the hottest advanced packaging technologies. New market drivers, namely the Internet of Things, that require miniaturized system-in-package solutions are bringing FOWLP to the forefront. Part one of this two-part series, we examine the back-story of FOWLP and the markets it serves.

2016 Outlook: Trends Driving Packaging Materials Development

January 25, 2016

Smartphone and smartwatch

If 2015 goes down in history as the year of 3D stacked memory, then it looks like 2016 may be remembered as the year for the first big adoptions of FOWLP. Dow’s Rob Kavanagh takes a look at the year ahead and the trends driving advanced packaging materials development.

Materials Considerations for Next-Gen Semiconductor Architectures, Part 1 of 2

July 07, 2015

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The semiconductor industry has been going through some rapid and radical metamorphoses over the past few years, which means taking new elements into consideration, such as battery size and life, security and integration of MEMS, sensors and RF devices. What does this mean for the consumable suppliers to the semiconductor industry?