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Showing all articles related to Cu TSV fill

Examining Unique Plating Challenges of TSVs

January 17, 2017

This tutorial examines the concept of copper (Cu) through silicon via (TSV) electroplating, which, when done optimally, increases reliability and decreases cost of subsequent process steps.

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Copper Electroplating Fundamentals

November 22, 2016

This tutorial examines the concept of copper electroplating and how the process works. It also discusses its use in advanced packaging applications like the dual damascene process, TSV, copper pillars, and copper RDL, as well as how feature geometry as well as plating time affect how additives behave.

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Dow to Present at PRiME 2016: From TSV to Copper Pillars’ Transformative Technology

September 27, 2016



The Pacific Rim Meeting on Electrochemical and Solid-State Science (PRiME) conference brings together leading industry players to discuss a diverse blend of electrochemical and solid-state science and technology. This year, Dow Electronic Materials will present on how TSV and copper pillars are transforming semiconductor advanced packaging technology.

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3D TSV Plating and Bumping: Rising to the Challenge

July 22, 2015

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3D integration using through silicon vias (TSVs) promises a fundamental shift for current multi-chip integration and packaging approaches, but it brings more difficulties in Cu electroplating. This piece explores process and material optimization efforts to enable volume manufacturing of 3D ICs.

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